This invention relates to stacking faults in silicon devices and, more particularly, to procedures for suppressing the formation of such stacking faults so that devices of more nearly uniform characteristics and improved performance can be fabricated.
The presence of stacking faults (SF) introduced during the processing of silicon devices is known to have a deleterious effect on device performance and may significantly reduce device yields in the fabrication of large scale integrated circuits. For example, localized microplasma breakdown of avalanche photodetectors, increased p-n junction leakage of various devices, and reduced storage time of CCDs have all been correlated with stacking fault defects. The stacking faults are generated during high temperature processing steps, most frequently during steam oxidation. The nucleation sites for these defects have been shown to be related to residual mechanical damage, local impurity precipitation and the so-called "swirl" defects. The latter two may be either process induced, i.e., caused by processing steps subsequent to crystal growth, or growth induced, i.e., native to the original cyrstal growth. Although adequate removal of surface damage is easily achieved with proper etching before polishing, it has not been a simple matter to remove process-induced or growth-induced defects from device wafers.
Numerous prior art studies of these defects in silicon wafers have produced the following results: (a) In the case of process-induced SF nucleation centers, small precipitates which form at or near the SiO.sub.2 --Si interface have been identified. In the case of SF nucleation centers introduced during the crystal growth, the oxidation induced SF distribution usually follows a swirl distribution for float zone silicon or a coring distribution for Czochralski silicon. It is probable that the precipitates and dislocation loops observed in the swirl pattern of dislocation free float zone silicon act as nucleation centers for the SF. (b) The oxidation induced SF have an extrinsic nature and grow by a climb mechanism from an interfacial dislocation presumably emitted by the precipitate. (c) In some instances impurities have been found to play an important role in promoting the formation of SF. A wafer surface orientation dependence on the appearance of SF has also been reported. In the case of HF treated, wet oxidized Si wafers, it has been found that {111} surfaces or surfaces with orientation 3.degree. to 10.degree. of {100} do not shown SF after oxidation.
This apparent wealth of experimental results, however, has not yet produced a solution to the SF problem which keeps reappearing in Si device fabrication. A number of important questions remain unanswered: (a) the nature of the precipitates which act as nuclei to the SF formation, (b) the nature of the impurities and point defects involved in the precipitate formation and the growth of the SF, and (c) the nature of the extrinsic fault. The SF could be composed of an extra plane of oxygen atoms or extra plane of Si atoms.
Since the answers to these guestions require complex analytical techniques in many cases not yet available, we sought a solution to the SF problem by using gettering techniques prior to any high temperature processing step which tends to induce SF.